Field
Various different embodiments relate to bit manipulation instructions, methods of executing the bit manipulation instructions, execution units to execute the bit manipulation instructions, or devices incorporating such execution units. In particular, various different embodiments relate to bit range isolation instructions to isolate a range of bits, methods of executing the bit range isolation instructions, execution units to execute the bit range isolation instructions, or devices incorporating such execution units.
Background Information
General-purpose processors, special-purpose processors, controllers, and other devices execute instructions as specified by an instruction set architecture (ISA). The instructions allow the devices to perform a wide variety of different types of operations. One common type of operation is a bit manipulation operation.
Various different bit manipulation instructions are known. One known bit manipulation instruction is the EXTR—Extract instruction. The EXTR instruction is described in the Intel® Itanium® Architecture Software Developer's Manual, Volume 3: Instruction Set Reference, Revision 2.2, January 2006, Document Number: 245319-005.
The EXTR instruction extracts a bit field specified by two immediate values, and right shifts the extracted bit field in order to right justify the extracted bit field in the destination. Such shifting of the extracted bit field in addition to extraction of the bit field in a single instruction may tend to limit the speed and/or efficiency of certain data processing operations. Other bit manipulation instructions rely on a table lookup, which tends to have long latency.
Due to the importance of quickly and/or efficiently processing data, new and different data manipulation instructions would be useful.